“CTI or Computer Telephony Integration Technology has been developed for more than 30 years. Among them, it is one of the typical applications in CTI. As an interface device between computer and public telephone network, its application field has penetrated into all sectors of society. At the same time, new technologies have been continuously injected into the development of voice cards. The software includes speech synthesis, speech recognition and other technologies, and the most important hardware is DSP technology and PCI bus technology. A PCI voice card based on TMS320VC5410DSP was developed, and the corresponding WDM device driver was designed, and good results were achieved.

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CTI or Computer Telephony Integration Technology has been developed for more than 30 years. Among them, it is one of the typical applications in CTI. As an interface device between computer and public telephone network, its application field has penetrated into all sectors of society. At the same time, new technologies have been injected into the development of the voice card. The software includes speech synthesis, speech recognition and other technologies, and the most important hardware is DSP technology and PCI bus technology. A PCI voice card based on TMS320VC5410DSP was developed, and the corresponding WDM device driver was designed, and good results were achieved.

1. Hardware design

1.1PCI bus control chip PCI2040

PCI bus is a local bus that is not attached to a specific processor. It supports 32-bit or 64-bit bus width, and the frequency is usually 33MHz. Currently, the fastest PCI2.0 bus operating frequency is 66MHz. When working at 33MHz and 32 bits, the theoretical maximum data transfer rate can reach 133MB/s. It supports burst working mode, improves transmission speed, supports plug and play, PCI components and drivers can run on a variety of different platforms.

There are generally two ways to implement the PCI bus protocol. One is to use FPGA design and implementation, but the PCI protocol is more complicated, so it is more difficult; the other is to use PCI bus control chips, such as AMCC’s S5933, PLX’s PCI9080 and other general-purpose PCI interface chip. TI company specially launched the chip PCI2040 for PCI bus and DSP interface, it not only realizes the function of PCI bus control, but also provides a seamless interface with DSP chip, thus greatly simplifying the complexity of system design and shortening the development time .

The internal functional block diagram of PCI2040 is shown in Figure 1.

PCI2040 is a PCI-DSP bridge device, which provides a seamless connection between PCI local bus and TMS320C54X8-bit host interface (HPI) and TMS320C6X16-bit host interface. A PCI2040 can connect up to 4 DSP chips at the same time. At the same time, it also provides a serial EEPROM interface, a general-purpose input and output interface (GPIO) and a 16-bit general-purpose bus interface (to provide an interface for the TIJTAG test bus controller). PCI2040 can only be used as a PCI target device, not as a PCI master device; it only supports single-word read and write, and cannot provide DMA operations. PCI2040 is compatible with 3.3V and 5V signal environment The 3.3V and 5V signals in the system can be obtained directly from the PCI slot.

1.2 Hardware Design of Voice Card

1.2.1 Function introduction and hardware block diagram

The voice card is designed based on TMS320VC5410DSP and PCI2040. The main functions of this card are: (1) Through the telephone signal tone detection module, the voice of the other party is converted by A/D, and then sent to DSP for compression processing. The compressed code stream is stored on the computer hard disk through PCI2040 through the PCI bus, so as to realize the recording function. (2) The compressed code stream (existing in the form of a file) stored on the hard disk is transmitted to the internal buffer of the DSP through the PCI2040 through the PCI bus for decompression processing (G.729 decoding algorithm), and the decoded data is Played back through D/A conversion.

The hardware block diagram of the voice card is shown in Figure 2.

The telephone signal tone detection part mainly realizes the functions of ringing detection, off-hook and voice transmission. The core of the system is DSP, which completes the processing of various complex algorithms, including G.729 codec algorithm, echo cancellation algorithm, voice detection and software picking and hanging algorithm. TMS320VC5410 is a high-performance DSP in the TI54X series. Its processing function reaches 100MIPS, so it can meet the requirements of algorithm complexity. Its biggest feature is that it integrates 64K×16bit RAM and 16K×16bit ROM on-chip, so it can meet the requirements of system design without adding SRAM or SDRAM. TMS320VC5410 has built-in 3 multi-channel buffer serial ports (McBSP), 6 DMA channels and an 8-bit enhanced HPI port, which can easily exchange data with the outside. In the design of the voice card, PCI2040 is used to complete the task of exchanging data between the DSP and the host.

1.2.2PCI2040 and TMS320VC5410 interface

The connection between PCI2040 and TMS320VC5410HPI port is shown in Figure 3.

PCI_AD31~PCI_AD15 determine the value of the ControlSpaceBaseAddress register of PCI2040, which is actually automatically allocated by the system. This is the case for all PNP devices. It maps the control space to the host memory, and the size of the mapped space is 232-17=32KB. The selection of DSP chip is realized by decoding PCI_AD14 and PCI_AD13. And PCI_AD12 and PCI_AD11 are mapped to HCNTL1 and HCNTL0 respectively, in order to decide the way to visit DSPHPI register. The corresponding relationship is shown in Table 1.

Therefore, the process of exchanging data between DSP and PC is the process of reading and writing HPI registers. The specific description is as follows:

(1) Initialize the internal configuration register of PCI2040, point to a specific DSP (there is only one DSP connected to PCI2040 in this system), and specify a data transmission width of 8 bits.

(3) After leaving the reset state, the PCI2040 decodes the address from the PCI bus to respond. If it falls into the control space of 32KB, access the corresponding HPI register according to HCNTL1 and HCNTL0 and chip selection.

(4) Set the BOB bit in the HPI control register and select the correct high and low 8-bit arrangement.

(5) The host starts to read and write the HPI register.

2. Design of PCI driver based on WDM

2.1WDM driver structure and principle

WDM is a new generation of driver architecture, it is a cross-platform driver model, fully compatible in operating systems above WINDOWS98. Not only that, WDM drivers can also be recompiled and run on non-Intel platforms without modifying the source code, thus providing great convenience for driver developers.

WDM drivers are hierarchical, that is, drivers on different layers have different priorities, while VxD under Windows9x does not have this structure. In addition, WDM also introduces two new concepts of functional device object FDO (FunctionalDeviceObject) and physical device object PDO (PhysicalDeviceObject) to describe hardware. PDO represents the actual hardware device, it is enumerated and established under the bus driver (BUSDRIVER), and is responsible for I/O operations with real hardware. FDO is established by the user driver. Generally speaking, it is a window for the user to perform I/O operations with real hardware, and is a bridge for Win32 to communicate with the kernel. For driver developers, all that really needs to be done is to develop FDO. As for the PDO, it is created by BUSDRIVER and passed as a parameter to your FDO by the I/OManager or other system components when needed.

When the application layer communicates with the bottom layer, the operating system packages each user request into an IRP (IORequestPacket) structure, sends it to the driver, and identifies which device it is sent to by identifying the PDO in the IRP. In addition, WDM identifies the driver not by the driver name, but by a 128-bit globally unique identifier (GUID).

WDM drivers all have an initialization entry point, DriverEntry, which is equivalent to the main function in C language. When the WDM driver is loaded, the kernel calls the DriverEntry routine. In addition, the WDM device driver also needs a plug-and-play module, namely AddDevice. The AddDevice routine is called by the PnP manager to create a WDM device object when the user inserts a new device.

2.2 PCI voice card driver design

The PCI bus supports plug and play, so using the WDM model to design the driver will make the program more reasonable, support more operating systems, and be more convenient in installation and maintenance.

The driver is mainly designed with DriverStudio2.5 plus VC++6.0. DriverStudio encapsulates the DDK, and uses the wizard to generate the driver framework. On this basis, add functions and statements for voice card processing to complete the design, and the debugging tool is SOFTICE. The block diagram of the program structure is shown in Figure 4.

PCI2040.lib and PCI2040.dll are in the Ring3 layer, which encapsulates the functions that deal with the underlying driver, and only exposes APIs such as Open_Device(), Close_Device(HANDLEhDevice), Record(HANDLEhDevice, LPSTRFileName), Play(HANDLEhDevice, LPSTRFileName) and other APIs. function. In this way, many programming languages ​​can be called in the form of DLL, which provides convenience for users.

The core programming is PCI2040.sys, which is located at the Ring0 layer and builds a bridge for the data exchange between the Ring3 layer and the PCI voice card. The main modules in the driver are:

(1) OnStartDevice(), in this routine, the driver will get the hardware resources allocated by the PnP manager for the voice card, including the HPICSR base address and the HPI control space base address, and initialize the PCI configuration space. Initialize interrupts, etc. It should be noted that the card is prohibited from sending interrupts to the host before initializing the interrupt, so there should be an operation to mask the interrupt.

(2) DeviceControl(), in this routine, you can customize your own functions to achieve the purpose of mutual communication between the Ring3 layer and the Ring0 layer. Different requests can be distinguished by IOCTL_CODE. For example:

#defineSEND_HEVENTCTL_CODE(FILE_DEVICE_UNKNOWN, 0x802, METHOD_BUFFERED, FILE_ANY_ACCESS)

In DeviceControl(), the following statements can be executed:

caseSEND_HEVENT:

status=SEND_HEVENT_Handler(I);//Receive the event handler passed by the application to WDM

m_Irq.Connect(LinkTo(Isr_Irq), this); //Connection interrupted

INT_MASK_SE T_UL=(ULONG) 0x80000001; //Open the corresponding interrupt mask bit

m_CtlMemoryRange.outw((ULONG) 0x0000, 0x0b0b); //Clear the interrupt bit and wait for the interrupt to arrive

break;

Put the connection interruption function in DeviceControl(), and not put it together with the initialization interruption (in OnStartDevice()), otherwise it will cause a crash in Win2000.

The DSP voice card is based on interrupt processing, so the above program plays such a role: when the voice card sends an interrupt to the host, the driver jumps to Isr_Irq for execution, and sets the event to the signal state in DpcFor_Irq to notify upper-layer application for processing.

(3) Isr_Irq(), this routine is used to handle interrupts. The interrupt handling mechanism of Windows 2000 assumes that multiple devices can share a hardware interrupt. Therefore, the first job of the Isr is to find out which device is interrupted. If not, it should return FALSE immediately so that the HAL can send the interrupt to other device drivers. The Interrupt Service Routine Isr executes at an elevated IRQL, and code running at the DIRQL level needs to run as fast as possible. Under normal circumstances, if it is judged that the interrupt is generated by its own device, a delayed procedure call (DpcFor_Irq) running at the DISPATCH_LEVEL level is called.

In the process of processing, it should be noted that when it is determined that it is the interrupt of your own card, the interrupt bit should be shielded immediately to prevent the interrupt from coming in again, and the interrupt should be opened at the end of DpcFor_Irq. Some of the statements in Dpc are as follows:

if (m_pEventToSignal!=NULL) m_pEventToSignal->SET ()//Set the event to the signal state

t “” “EventSE T! “;

INT_MASK_SE T_UL=(ULONG)(0x80000001); //Open interrupt

M_CtlMemoryRange.outw((ULONG) 0x0000, 0x0b0b);